1. Field of the Invention
The present invention relates to a display device comprising a display panel such as a plasma display panel (hereinafter, referred to as xe2x80x9cPDPxe2x80x9d) and a driving circuit for driving the display panel.
2. Description of the Background Art
A display device will be discussed below, taking a case of a plasma display device as an example. FIG. 14 is a block diagram showing a constitution of a plasma display device in the background art (see U.S. Pat. No. 2,894,039). A display panel 101 comprises a plurality of scan electrodes 102 extending in a first direction, common electrodes (not shown) which are paired with the scan electrodes 102, respectively, and a plurality of address electrodes 103 separated from the scan electrodes 102 and the common electrodes, extending in a second direction perpendicular to the first direction.
The scan electrodes 102 are connected to a scan electrode driving circuit 104. The address electrodes 103 are divided into four clusters in accordance with the positions in the display panel 101. A plurality of address electrodes 103 belonging to the cluster corresponding to the leftmost quarter region of an image are connected to an address electrode driving circuit 105i. A plurality of address electrodes 103 belonging to the cluster corresponding to the left-center quarter region of the image are connected to an address electrode driving circuit 105j. A plurality of address electrodes 103 belonging to the cluster corresponding to the right-center quarter region of the image are connected to an address electrode driving circuit 105k. A plurality of address electrodes 103 belonging to the cluster corresponding to the rightmost quarter region of the image are connected to an address electrode driving circuit 105l. 
The scan electrode driving circuit 104 and the address electrode driving circuits 105i to 105l are connected to a control circuit 106. Further, the address electrode driving circuits 105i to 105l are connected to a signal processing circuit 107. The address electrode driving circuits 105i to 105l each have a shift register (not shown) therein. The signal processing circuit 107 is connected to the control circuit 106.
The control circuit 106 receives a synchronizing signal from the outside and outputs a scan electrode driving control signal S1, a transfer data determination signal S2, a transfer clock TC and a signal processing control signal S3. The signal processing circuit 107 receives a video signal from the outside and the signal processing control signal S3 from the control circuit 106 and outputs transfer data Di to Dl which are digital data.
The transfer data determination signal S2 and the transfer clock TC are commonly inputted to the address electrode driving circuits 105i to 105l from the control circuit 106. Further, the transfer data Di to Dl of the same phase are inputted to the address electrode driving circuits 105i to 105l, respectively, from the signal processing circuit 107.
Thus, in the background-art plasma display device, the address electrodes 103 are divided into a plurality of clusters in accordance with the positions in the display panel 101 and the address electrode driving circuits 105i to 105l are provided correspondingly to the respective clusters of the address electrodes 103. Therefore, it is possible to transmit the transfer data Di to Dl in parallel to the address electrode driving circuits 105i to 105l from the signal processing circuit 107. Accordingly, it becomes possible to lower the speed of data transmission to the shift register in the address electrode driving circuit as compared with a plasma display device in which the address electrodes 103 are not divided into a plurality of clusters and the transfer data are transmitted in series to a single address electrode driving circuit from the signal processing circuit.
In the background-art plasma display device, however, the transfer data Di to Dl of the same phase are outputted from the signal processing circuit 107 and then the transfer data Di to Dl are stored in the shift registers of the address electrode driving circuits 105i to 105l, respectively, on the basis of the common transfer clock TC.
Therefore, a large amount of electromagnetic waves and magnetic fields are generated due to the transition of a plurality of digital data having the same phase at the same timing, which cause noises in a display image and affect other devices and circuits. For this reason, a tight electromagnetic shield is needed in the display device, which causes a rise in cost.
The present invention is directed to a display device. According to a first aspect of the present invention, the display device comprises: a display panel having a plurality of scan electrodes extending in a first direction and a plurality of address electrodes separated from the plurality of scan electrodes, extending in a second direction perpendicular to the first direction; a plurality of address electrode driving circuits connected to the plurality of address electrodes; and a signal processing circuit connected to the plurality of address electrode driving circuits, and in the display device of the first aspect, the plurality of address electrodes are divided into a plurality of clusters, the plurality of address electrode driving circuits are provided correspondingly to the plurality of clusters of the address electrodes and include a first and a second address electrode driving circuits, and digital data transmitted from the signal processing circuit to the first address electrode driving circuit and digital data transmitted from the signal processing circuit to the second address electrode driving circuit are different in phase from each other.
According to a second aspect of the present invention, in the display device, the plurality of address electrodes are divided into m (m is an integer, not less than two) clusters, the plurality of address electrode driving circuits are m address electrode driving circuits, and the digital data transmitted from the signal processing circuit to the m address electrode driving circuits are different in phase from one another.
According to a third aspect of the present invention, in the display device, the plurality of address electrodes are divided into m (m is an integer, not less than two) clusters, the plurality of address electrode driving circuits are m address electrode driving circuits, the m address electrode driving circuits are divided into n (n is an integer, not less than two and not more than mxe2x88x921) groups, and the digital data inputted to one or a plurality of address electrode driving circuits belonging to same group are equivalent in phase to one another and the digital data inputted to a plurality of address electrode driving circuits belonging to different groups are different in phase from one another.
According to a fourth aspect of the present invention, in the display device, the signal processing circuit has a first register temporarily storing first digital data transmitted to the first address electrode driving circuit; a second register temporarily storing second digital data transmitted to the second address electrode driving circuit; a first delay element for delaying the first digital data outputted from the first register by a predetermined time and inputting the first digital data into the first address electrode driving circuit; and a second delay element for delaying the second digital data outputted from the second register by a time different from the predetermined time and inputting the second digital data into the second address electrode driving circuit.
According to a fifth aspect of the present invention, in the display device of any one of the first to fourth aspects, the plurality of scan electrodes include a plurality of first scan electrodes provided in a first region of the display panel and a plurality of second scan electrodes provided in a second region of the display panel, and the display device further comprises: a first scan electrode driving circuit connected to the plurality of first scan electrodes; a second scan electrode driving circuit connected to the plurality of second scan electrodes; and a control circuit connected to the first and second scan electrode driving circuits. In the display device of the fifth aspect, an addressing period during which an addressing operation is performed to select a cell which should be illuminated and a discharge sustain period during which a discharge for luminescence is generated on the cell which is selected by the addressing operation are repeated to perform a display operation in one field of display, and the discharge sustain period for the display operation in the first region and the discharge sustain period for the display operation in the second region do not overlap each other by the control circuit controlling the first and second scan electrode driving circuits.
According to a sixth aspect of the present invention, the display device comprises: a display panel having a plurality of first scan electrodes extending in a first direction in a first region of the display panel, a plurality of second scan electrodes extending in the first direction in a second region of the display panel and a plurality of address electrodes separated from the plurality of first and second scan electrodes, extending in a second direction perpendicular to the first direction; a first scan electrode driving circuit connected to the plurality of first scan electrodes; a second scan electrode driving circuit connected to the plurality of second scan electrodes; and a control circuit connected to the first and second scan electrode driving circuits. In the display device of the sixth aspect, an addressing period during which an addressing operation is performed to select a cell which should be illuminated and a discharge sustain period during which a discharge for luminescence is generated on the cell which is selected by the addressing operation are repeated to perform a display operation in one field of display, and the discharge sustain period for the display operation in the first region and the discharge sustain period for the display operation in the second region do not overlap each other by the control circuit controlling the first and second scan electrode driving circuits.
In the plasma display device of the first aspect of the present invention, it is possible to suppress generation of electromagnetic waves and magnetic fields caused by the transition of a plurality of digital data having the same phase at the same timing.
In the plasma display device of the second aspect of the present invention, by varying all the phases of respective digital data transmitted to the m address electrode driving circuits, it is possible to enhance the effect of suppressing generation of electromagnetic waves and magnetic fields to the maximum.
In the plasma display device of the third aspect of the present invention, since a plurality of address electrode driving circuits belonging to one group handle digital data of the same phase, it is possible to reduce the delay time of the data output when the phases of the digital data are varied by delay.
In the plasma display device of the fourth aspect of the present invention, with a simple constitution using well-known registers and delay elements, it is possible to obtain a plurality of digital data outputted from the signal processing circuit with phases varied from one to another.
In the plasma display device of the fifth aspect of the present invention, it is possible to disperse the discharge sustain operation which accounts for most of the power consumption in the display device.
In the plasma display device of the sixth aspect of the present invention, it is possible to disperse the discharge sustain operation which accounts for most of the power consumption in the display device.
The present invention relates to a display device which is provided with address electrode driving circuits correspondingly to a plurality of clusters of address electrodes, and an object of the present invention is to provide a display device which can prevent transition of a plurality of digital signals at the same timing to suppress generation of electromagnetic waves and magnetic fields which would be caused thereby.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.